The invention relates generally to a process for fabricating semiconductor devices, and, more particularly, to a process for fabricating conductivity connected charge-coupled devices (C4D's).
A known process for the fabrication of C4D's, used by Bell Laboratories, comprises essentially the following sequence of steps. A layer of thick oxide is initially grown on a semiconductor substrate. The thick oxide layer is subsequently etched to expose the barrier regions which are to be implanted, as well as the regions between the channels, a channel constituting a succession of individual C4D storage cells. Next another layer of oxide is grown and etched to expose only the implant regions of the substrate. This is followed by the implantation of the barrier regions. All oxide is then removed, and the field oxide layer is grown and etched. Next the gate oxide is laid down in what is referred to in the semiconductor art as a "high temperature step." A refractory material such as tungsten is next deposited and etched to define the electrodes as well as the intervening conductivity connecting regions. Finally the conductivity connecting regions are implanted, and the entire device is subjected to a further high temperature step in order to activate the conductivity connecting regions.